INTEL’S ANNUAL SYMPOSIUM ON VLSI CAD AND VALIDATION

Date: November, 05, 2012

Location: Auditorium 280 Electrical Eng. Building Technion City

You are kindly invited to:

Monday, November 5, 2012, 7:40 – 15:45
Auditorium Floor 2, Room 280, Electrical Engineering Building, Technion


	Computer Security: Modeling and Validation

Schedule

	07:40 – 08:20	Reception and light refreshments
	08:20 – 08:30	Opening
	08:30 – 09:20	Keynote: Trends and Challenges in CPU Security Ittai Anati (Senior Principal Engineer, Intel Haifa)
	09:20 – 10:10	Real-World Attacks Against Security Hardware Christof Paar (University of Bochum)
	10:10 – 10:30	Coffee break
	10:30 – 11:20	The Science of Privacy: New Directions and Application Moni Naor (Weizmann Institute)
	11:20 – 12:10	Advances in Processor Architectures for Accelerating Cryptographic Algorithms, and their Potential Influence on Servers’ Efficiency Shay Gueron (Principal Engineer, Intel Haifa & University of Haifa)
	12:10 – 14:00	Lunch
	14:00 – 14:50	Design and Verification of Security-Aware Processors Ruby Lee (Princeton University)
	14:50 – 15:40	Bit-Tight Design: A Clean-Slate Approach to Hardware-Assisted Security and Resiliency Ryan Kastner (University of California, San Diego)
	15:45	Closing